Samsung renames D0a to hybrid bonding; eyes HBM5

Opening

Samsung has moved wafer-to-wafer hybrid bonding (B1b) onto its formal next-gen DRAM roadmap as the D0a label, demoting VCT DRAM to a separate D0a-V track, per ZDNet Korea. ZDNet Korea (Jang Kyung-yoon, Sep 23) reports B1b had been developed as a project but was not on the formal roadmap; it is now named as the first sub-10 nm-class DRAM node. Previously D0a referred to vertical-channel-transistor (VCT) DRAM. The paper frames the rename as accelerating advanced packaging into commodity DRAM: cell and peri on separate wafers, bonded Cu-to-Cu. Sources cited say commercialization hurdles for B1b look lower than VCT, and that Samsung is prioritizing B1b. Surfaced overnight by @jukan05.

The numbers

D0a label — reassigned from VCT to B1b (W2W hybrid bonding); VCT → D0a-V — ZDNet Korea / sources. Commercialization of B1b-based D0a — earliest ~2 years; mass-production investment schedule expected mid next year — ZDNet Korea / industry. HBM5 — Samsung reviewing B1b attach; mass production expected ~2029; target ~50%+ higher operating speed vs HBM4E — ZDNet Korea. Prior nodes (marketing class) — 1c ~11–12 nm; 1d ~10–11 nm as last 10 nm-class — ZDNet Korea.

Why it matters

Roadmap timing for the packaging step that lifts DRAM density without waiting on harder VCT cell change. If B1b also lands in HBM5, hybrid bonding becomes a shared platform across commodity DRAM and stacked AI memory rather than NAND/CIS-only.

Positioning

HBM supply binds — Does not loosen near-term HBM wafer scarcity; shifts which process Samsung prioritizes for sub-10 nm / HBM5 density. Binding constraint stays capacity and stack yield until HBM5 prints.

Connects to

16Hi timing — Same window JPM model push of 16Hi adoption to 2029 earliest (discussion). Prior HBM stack debate — 4-Hi vs taller stacks for inference vs datacenter (discussion).