Jake Ayes 2 items
‹ All posts People /Jake Ayes /Discussion ARCHIVE
Discussion · Wed, 23 Sept 2026 · 07:28 ET

Is 16Hi HBM really pushed to 2029 — and does that extend 12Hi tight?

jukan05: JPM HBM model now sees 16Hi adoption 2029 earliest. Replies split on earlier slip vs prolonged 8/12Hi scarcity; no JPM primary in-thread.

top-replies JukanJake Ayes JPMorganSK HynixSamsungMicron Source ↗
Review after: 2026-12-15

Opening

jukan05's JPM relay — 16Hi adoption 2029 at earliest — is the load-bearing print; the room mostly treats it as late vs prior mental models, not as disproved. @jukan05 (Tue ~7:38pm ET): "JPM has updated its HBM model and now expects 16Hi HBM adoption in 2029 at the earliest." Visible replies cluster on surprise at the calendar and on whether delay extends 8Hi/12Hi tightness; one voice says it will land earlier once DRAM supply loosens from 2028. No JPMorgan note text or table appears in-thread — claim is secondhand via a tier-2 supply-chain account. Deep tail unread (top-replies).

Sides

FOR — 16Hi is a 2029+ event; near-term stack stays 8/12Hi

  • @jukan05 [pseudo] — JPM model update: 16Hi adoption 2029 earliest
  • @aidriventrading [anon] — if 16Hi slips to 2029, near-term bottleneck stays 12Hi yield/stacking/capacity → packaging constraints extend
  • @DataInsightLab [anon] — asks whether JPM's 2029 assumes JEDEC height lift toward 900µm vs current 775µm limit (unanswered in sample)

AGAINST — calendar too late; 16Hi arrives sooner

  • @AnalysisOp [anon] — will be earlier; timed to more DRAM supply capacity from 2028 on

THIRD — wrong question / substitute

  • @jake_ayes [named] — with optical interconnect around then, do we even need 16Hi?
  • @shadowaguy [anon] — if HBM supply was the bind, this timeline implies a weirder bottleneck

Room: single named supply-chain relay of a bank model; replies mostly anon reaction. No OEM or memory-maker confirmation in the visible sample.

Quotes

JPM has updated its HBM model and now expects 16Hi HBM adoption in 2029 at the earliest.

Good morning. — Jukan (@jukan05)

Will be earlier. Just in time when there will be more DRAM Supply capacity out there (from 2028 on) — Alex A.C. (@AnalysisOp)

If 16Hi slips to 2029, the near term bottleneck stays with 12Hi yield, stacking and capacity. That could extend today’s packaging constraints. — David (@aidriventrading)

With optical interconnect around then do we even ever really need it? — Jake Ayes (@jake_ayes)

If JEDEC does lift the height cap toward 900um, does JPM's 2029 timing assume that change or the current 775um limit? — Data Insight Lab (@DataInsightLab)

What would settle it

A primary JPMorgan (or other bulge) HBM supply/demand note stating 16Hi volume timing with stack-height / JEDEC assumptions Knowable — sell-side note or client deck leak with dated model — through 2026-12-15

Memory-maker or GPU/ASIC OEM guidance that names 16Hi SKU qualification or volume start year Knowable — earnings / tech-day roadmap language — through 2027-06-30

JEDEC package-height spec change (e.g. toward ~900µm) that unlocks taller stacks on the critical path jukan's thread flags Knowable — JEDEC / industry standard publication — through 2027-03-31

Delta

Builds on the Sep 14 4-Hi vs taller-stack frame: new falsifiable calendar for 16Hi specifically, still without a primary bank PDF in-thread.

The Open/Close  ·  Research commentary, not investment advice. Positions may be held in securities mentioned.